Dynamic Adaptive Neural Network Array

We present the design-scheme and physical implementation for a Dynamic Adaptive Neural Network Array (DANNA) based upon the work by Schuman and Birdwell [1,2] and using a programmable array of elements constructed with a Field Programmable Gate Array (FPGA). The aim of this paper is to demonstrate how a single programmable neuromorphic element can be designed to support the primary components of a dynamic and adaptive neural network, e.g. a neuron and a synapse, and be replicated across a FPGA to yield a reasonably large programmable DANNA of up to 10,000 neurons and synapses. We describe element programmability, how the dynamic components of a neuron and synapse are supported, and the structure used to support the monitoring and control interface. Finally, we present initial results from simulations of the hardware, the projected performance of the array elements and the physical implementation of a DANNA on a Xilinx FPGA.

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