论文信息 - Efficient realisation of MOS-NDR threshold logic gates

Efficient realisation of MOS-NDR threshold logic gates

A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms of area and power consumption, has been performed to demonstrate that the proposed circuit is more efficient than a similar reported structure.

Maria J. Avedillo | José M. Quintana | Juan Nunez

[1] Cy Wu,et al. INTEGRATED ALPHA-TYPE DIFFERENTIAL NEGATIVE-RESISTANCE MOSFET DEVICE , 1979 .

[2] Pinaki Mazumder,et al. Digital circuit applications of resonant tunneling devices , 1998, Proc. IEEE.

[3] Werner Prost,et al. Threshold logic circuit design of parallel adders using resonant tunneling devices , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[4] Cher-Shiung Tsai,et al. Four-valued memory circuit using three-peak MOS-NDR devices and circuits , 2006 .