A 10 GHz multiphase LC VCO with a ring capacitive coupling structure

A multiphase LC voltage-controlled oscillator (VCO) with a novel capacitive coupling CL ladder filter structure is proposed in this paper and this 10 GHz eight-phase VCO is applied in clock and data recovery (CDR) circuit for 40 Gb/s optical communications system. Compared with the traditional eight-phase oscillator, this capacitive coupling structure can decrease the number of inductors to half and only of four inductors. The VCO is designed and taped out in TSMC 65 nm CMOS technology. Measurement results show the phase noise is 105.95 dBc/Hz at 1MHz offset from a carrier frequency of 10 GHz. The chip area of VCO is 480 μm×700 μm and the VCO core power dissipation is 4.8 mW with the 1.0 V supply voltage.

[1]  Behzad Razavi,et al.  A 10-Gb/s CMOS clock and data recovery circuit with a half-rate binary phase/frequency detector , 2003, IEEE J. Solid State Circuits.

[2]  J. Lee,et al.  A 40 Gb/s clock and data recovery circuit in 0.18 /spl mu/m CMOS technology , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[3]  G. Jacquemod,et al.  Low phase noise 130nm CMOS ring VCO , 2011, 2011 IEEE 9th International New Circuits and systems conference.

[4]  Deukhyoun Heo,et al.  A 1.3V Low Phase Noise 2-GHz CMOS Quadrature LC VCO , 2006, 2006 European Microwave Integrated Circuits Conference.

[5]  Chang-Lin Hsieh,et al.  20Gb/s 1/4-rate and 40Gb/s 1/8-rate burst-mode CDR circuits in 0.13 μm CMOS , 2008, 2008 IEEE Asian Solid-State Circuits Conference.

[6]  Li Zhang,et al.  A low-jitter low-power monolithically integrated optical receiver for SDH STM-16 , 2011, Science China Information Sciences.

[7]  Vadim Issakov,et al.  A 5.9-to-7.8 GHz VCO in 65 nm CMOS using high-Q inductor in an embedded Wafer Level BGA package , 2011, 2011 IEEE MTT-S International Microwave Symposium.

[8]  Yue Ping Zhang,et al.  A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[9]  P. Gamand,et al.  A Two-Stage Ring Oscillator in 0 . 13-� m CMOS for UWB Impulse Radio , 2009 .

[10]  Shen-Iuan Liu,et al.  A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13- $\mu$m CMOS Technology , 2007, IEEE Journal of Solid-State Circuits.

[11]  William J. Dally,et al.  Jitter transfer characteristics of delay-locked loops - theories and design techniques , 2003, IEEE J. Solid State Circuits.

[12]  Hoi-Jun Yoo,et al.  A 4-Gb/s CMOS clock and data recovery circuit using 1/8-rate clock technique , 2003 .

[13]  Liang-Hung Lu,et al.  A 15/30-GHz Dual-Band Multiphase Voltage-Controlled Oscillator in 0.18- $\mu$m CMOS , 2007, IEEE Transactions on Microwave Theory and Techniques.

[14]  P. Gamand,et al.  A Two-Stage Ring Oscillator in 0.13- $\mu{\hbox{m}}$ CMOS for UWB Impulse Radio , 2009, IEEE Transactions on Microwave Theory and Techniques.

[15]  Behzad Razavi,et al.  A 40-Gb/s Clock and Data Recovery Circuit in , 2003 .

[16]  Behzad Razavi,et al.  A 40 Gb/s clock and data recovery circuit in 0.18 μm CMOS technology , 2003 .

[17]  Pietro Andreani,et al.  A switched-transformer, 76% tuning-range VCO in 90nm CMOS , 2010, 2010 Asia-Pacific Microwave Conference.

[18]  D. Zito,et al.  13 GHz CMOS Active Inductor LC VCO , 2012, IEEE Microwave and Wireless Components Letters.

[19]  Wei Li,et al.  A 15 GHz CMOS low phase noise VCO using coupled coplanar waveguide , 2011, 2011 3rd International Conference on Computer Research and Development.