A novel clock recovery circuit for fully monolithic integration
暂无分享,去创建一个
[1] A. Sano,et al. Optical repeater circuit design based on InAlAs/InGaAs HEMT digital IC technology , 1997 .
[2] Y. Imai,et al. 80 Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs , 1997 .
[3] Taiichi Otsuji,et al. Exclusive OR/NOR IC for 40-Gbit/s Clock Recovery Circuit , 1999 .
[4] F. Schumann,et al. 40 Gb/s integrated clock and data recovery circuit in a silicon bipolar technology , 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).
[5] Z.G. Wang,et al. A complete GaAs HEMT single chip data receiver for 40 Gbit/s data rates , 1998, GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260).
[6] Eiichi Sano,et al. A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-/spl mu/m GaAs MESFET , 1995 .
[7] Y. Imai,et al. 2-46.5 GHz quasi-static 2:1 frequency divider IC using InAlAs/InGaAs/InP HEMTs , 1997 .
[8] Tomoyoshi Kataoka,et al. Limitations and challenges of single-carrier full 40-Gbit/s repeater system based on optical equalization and new circuit design , 1997, Proceedings of Optical Fiber Communication Conference (.
[9] E. Sano,et al. A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19 Gb/s decision circuit using 0.2 /spl mu/m GaAs MESFET , 1994, Proceedings of 1994 IEEE GaAs IC Symposium.
[10] A. Thiede,et al. 40 and 20 Gbit/s monolithic integrated clock recovery using a fully-balanced narrowband regenerative frequency divider with 0.2 /spl mu/m AlGaAs/GaAs HEMTs , 1996 .
[11] I. M. Stephenson,et al. Injection locking of microwave solid-state oscillators , 1971 .
[12] Yohtaro Umeda,et al. Exclusive OR/NOR IC for >40 Gbit/s optical transmission systems , 1998 .