Lightweight Timing Channel Protection for Shared DRAM Controller

The shared memory controllers of Single-Chip Cloud computing processors are vulnerable to timing-channel attacks. Existing protection strategies based on fixed memory bandwidth assignment degrade processor performance and severely harm the experience of cloud-users. This paper proposes a novel light-weight timing channel protection scheme against both side channel and covert channel attacks to the shared memory controllers of cloud Chip Multi-Processors (CMPs). Instead of enforcing a fixed time-slot assignment to the applications, we go an entirely different technical route and utilize the background DRAM refresh as a free noise source to eliminate the time correlation between victim and attacker applications. The proposed protection framework, MemJam, relies on emerging Fine-Grained Refresh technology to achieve the effects of timing channel obfuscation. Multi-programmed workloads running in a cloud CMP were used to evaluate the protection method. The results show that the light-weight refresh-based noise can effectively block the timing-channel between user applications, and achieve up to $1. 69\sim 3\mathrm {X}$ memory performance boost compared to prior solutions.