Highly-performant 38 nm SON (silicon-on-nothing) P-MOSFETs with 9 nm-thick channels

38 nm SON P-MOSFETs are presented in this paper, completing the formerly presented SON NMOSFETs and thus demonstrating the electrical viability of the SON architecture for aggressive CMOS. Morphological results show that the SON architecture allows comfortable silicidation process leading to a large improvement of the performance. In particular, for the thinnest Si-channel (9 nm), extremely good subthreshold behavior is observed (with less than 60 mV of DIBL on a 38 nm transistor). The performances of the devices are excellent (360 /spl mu/A//spl mu/m Ion with 100 nA Ioff for a 38 nm PMOS device @-1.4V with T/sub ox/=20 /spl Aring/) and show large potential of the SON architecture for future CMOS generations.