Gate Breakdown in MESFET's and HEMT's

A new model for gate breakdown in MESFET's and HEMT's is presented. The model is based upon a combina- tion of thermally assisted tunneling and avalanche breakdown. When thermal effects are considered it is demonstrated that the model predicts increasing drain-source breakdown as the gate electrode is biased towards pinch-off, in agreement with experi- mental data. The model also predicts, for the first time, the gate current versus bias behavior observed in experimental data. The model is consistent with the various reports of breakdown and light emission phenomena reported in the literature. tic when plotted for varying Vgs (e.g., see (2, fig. 3@)) or In this report a new thermal/tunnel/avalanche explanation of gate breakdown is presented and it is demonstrated that the new model adequately explains measured data. The new model allows for both tunneling and avalanche breakdown of the gate electrode. Which mechanism dominates is deter- mined by device structure, bias, channel temperature, and operating conditions. The model also provides an explanation for the success of thin surface insulators formed by low-tem- perature MBE growth in producing significantly increased gate breakdown voltages. This technique has been demon- strated to increase MESFET and HEMT breakdown voltages by at least a factor of 2 (9)-(ll) compared to devices without the surface layers. The increase in breakdown voltage has resulted in improved RF output power for GaAs MESFET's of about 1.6 W/mm (lo), (ll) and significant additional improvements are expected in the near future.