Equivalence checking using Gröbner bases
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Rolf Drechsler | Mathias Soeken | Amr A. R. Sayed-Ahmed | Daniel Große | R. Drechsler | Daniel Große | Mathias Soeken
[1] Cunxi Yu,et al. Automatic word-level abstraction of datapath , 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).
[2] Akira Suzuki,et al. Boolean Gröbner bases , 2011, J. Symb. Comput..
[3] André Rossi,et al. Verification of gate-level arithmetic circuits by function extraction , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[4] Jason Baumgartner,et al. Automatic formal verification of fused-multiply-add FPUs , 2005, Design, Automation and Test in Europe.
[5] Anna Slobodov. Challenges for formal verification in industrial setting , 2006 .
[6] R. Brayton,et al. Improvements to Combinational Equivalence Checking , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[7] Rolf Drechsler,et al. Grouping heuristics for word-level decision diagrams , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).
[8] Rolf Drechsler,et al. Formal verification of integer multipliers by combining Gröbner basis with logic reduction , 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[9] Rolf Drechsler,et al. Binary decision diagrams in theory and practice , 2001, International Journal on Software Tools for Technology Transfer.
[10] Malay K. Ganai,et al. Robust Boolean reasoning for equivalence checking and functional property verification , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[11] Farimah Farahmandi,et al. Groebner basis based formal verification of large arithmetic circuits using Gaussian elimination and cone-based polynomial extraction , 2015, Microprocess. Microsystems.
[12] Robert K. Brayton,et al. Using SAT for combinational equivalence checking , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.
[13] Mary Joseph,et al. Double precision floating point core in verilog , 2016 .
[14] Robert K. Brayton,et al. ABC: An Academic Industrial-Strength Verification Tool , 2010, CAV.
[15] Akira Nagai,et al. An Implementation Method of Boolean Gröbner Bases and Comprehensive Boolean Gröbner Bases on General Computer Algebra Systems , 2014, ICMS.
[16] Tim Pruss,et al. Efficient Symbolic Computation for Word-Level Abstraction From Combinational Circuits for Verification Over Finite Fields , 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[17] Anna Slobodová. Challenges for Formal Verification in Industrial Setting , 2006, FMICS/PDMC.
[18] Rolf Drechsler,et al. Simulation graphs for reverse engineering , 2015, 2015 Formal Methods in Computer-Aided Design (FMCAD).