The Communication Efficiency fo Meshes, Boolean Cubes and Cube Connected Cycles for Wafer Scale Integraton

In this paper we analyze the emulation of two-dimensional meshes, butterfly networks, and spanning trees on meshes, Boolean cubes, and Cube Connected Cycles (CCC) networks. We consider three timing models for signal propagation dong a wire: constant delay, capacitive delay, and resistive delay. We ais0 present novel layouts for hypercubes and CCCs that offer better performance for some problems, while essentially maintainingthe performance for other problems. The mesh interconnection performs better on all emulations for all delay models,if the communication throughput determines the performance. With resistive delay model, meshes also offer the best latency for all emulations. The hypercube and CCC layouts yield lower latency for emulating butterlly networks and spanning trees for the constant delay and capacitive delay models.