Adiabatic switching techniques based on energy recovery principle are one of the innovative solutions at circuit and logic level to achieve reduction in power. Many researchers had taken adder as a benchmark circuit but advantage of adiabatic can be taken only for a large digital circuit. Barrel shifter is an important block in the processor design and not much effort has been done to minimize itpsilas power dissipation. A barrel shifter needs nlog2n MUX for n-bit shifting and therefore designing a MUX for low power to use it as a repetitive block in the barrel shifter will considerably reduce the simulation time. This paper compares conventional CMOS based design with adiabatic All the circuits are designed using cell based design approach and 180 nm device size in Cadence. The outcome of this research work will provide guidelines for designing barrel shifter using ultra low power MUX .
[1]
Nestoras Tzartzanis,et al.
Low-power digital systems based on adiabatic-switching principles
,
1994,
IEEE Trans. Very Large Scale Integr. Syst..
[2]
Vojin G. Oklobdzija,et al.
Pass-transistor adiabatic logic using single power-clock supply
,
1997
.
[3]
Vojin G. Oklobdzija,et al.
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply
,
2000,
IEEE Trans. Very Large Scale Integr. Syst..
[4]
Jan M. Rabaey Et.Al.
Low Power Design Methodologies
,
2009
.
[5]
L. Varga,et al.
An improved pass-gate adiabatic logic
,
2001,
Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558).
[6]
Massoud Pedram,et al.
Low power design methodologies
,
1996
.