Impact of Implementation Design Tradeoffs on Performance: The PDP-11, A Case Study

This chapter discusses the impact of implementation design tradeoffs on performance of PDP-11. The PDP-11 provides an interesting opportunity to examine the architecture with numerous implementations, spanning a wide range of price and performance. The implementations fall into three distinct categories: (1) the midrange machines (PDP-11/04, 11/10, 11/20, 11/34, 11/40, 11/60), (2) an inexpensive, relatively low performance machine (LSI-11) and (3) a comparatively expensive but high performance machine (PDP-11/45). The midrange machines are all minor variations on a common theme with each implementation introducing much less variability than can be expected. Their differences reside in the presence or absence of certain embellishments rather than in any major structural differences. Performance of the PDP-11 processor itself can be enhanced in two ways: (1) by cutting the number of processor cycles to perform a given function or (2) by cutting the time used per microcycle. The PDP-11/45 can perform much more in a given microcycle than any of the midrange PDP-11s and, thus, needs fewer microcycles to complete an instruction.