Modifying Buried Layers in Nano-MOSFET for Achieving Reliable Electrical Characteristics

[1]  Sorin Cristoloveanu,et al.  Silicon on insulator technologies and devices: from present to future , 2001 .

[2]  M. Mehrad Periodic trench region in LDMOS transistor: A new reliable structure with high breakdown voltage , 2016 .

[3]  M. Zareiee,et al.  Improved Device Performance in Nano Scale Transistor: An Extended Drain SOI MOSFET , 2016 .

[4]  M. Mehrad Thin layer oxide in the drift region of Laterally double-diffused metal oxide semiconductor on silicon-on-insulator: A novel device structure enabling reliable high-temperature power transistors , 2015 .

[5]  A. Orouji,et al.  Improvement of self-heating effect in a novel nanoscale SOI MOSFET with undoped region: A comprehensive investigation on DC and AC operations , 2013 .

[6]  S. E. J. Mahabadi Upper drift region double step partial SOI LDMOSFET: A novel device for enhancing breakdown voltage and output characteristics , 2016 .

[7]  A novel partial SOI LDMOSFET with a trench and buried P layer for breakdown voltage improvement , 2011 .

[8]  S. E. Jamali Mahabadi,et al.  A new partial SOI-LDMOSFET with a modified buried oxide layer for improving self-heating and breakdown voltage , 2011 .

[9]  A. Orouji,et al.  A novel high breakdown voltage LDMOS by protruded silicon dioxide at the drift region , 2016 .

[10]  M. Zareiee,et al.  A novel high performance nano-scale MOSFET by inserting Si3N4 layer in the channel , 2015 .

[11]  A. Orouji,et al.  Partially Cylindrical Fin Field-Effect Transistor: A Novel Device for Nanoscale Applications , 2010, IEEE Transactions on Device and Materials Reliability.

[12]  Mahsa Mehrad Reducing Floating Body and Short Channel Effects in Nano Scale Transistor: Inserted P+ Region SOI-MOSFET , 2016 .

[13]  A. Orouji,et al.  A new nanoscale and high temperature field effect transistor: Bi level FinFET , 2011 .

[14]  Combination of a 4H-SiC MESFET with a 4H-SiC MOSFET to realize a high voltage MOSFET , 2011, 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies.

[15]  A. Orouji,et al.  Dual material insulator SOI-LDMOSFET: A novel device for self-heating effect improvement , 2011 .

[16]  A. Orouji,et al.  A new technique in LDMOS transistors to improve the breakdown voltage and the lattice temperature , 2015 .

[17]  Ali Afzali-Kusha,et al.  Ground plane fin-shaped field effect transistor (GP-FinFET): A FinFET for low leakage power circuits , 2012 .

[18]  A. Orouji,et al.  The Best Control of Parasitic BJT Effect in SOI-LDMOS With SiGe Window Under Channel , 2012, IEEE Transactions on Electron Devices.