SPPV: a new formal verification environment

Formal verification has become an integral part of the product development cycle leading to a demand for powerful, yet easy to use tools, which conceal the complexity of the underlying mathematical arguments through the use of convenient interfaces and automatic verification. In this paper we present a new formal verification environment-SPPV-based on series-parallel poset verification. SPPV allows fast, automated verification of event sequencing in complex systems. The system model and properties can be expressed as series-parallel poset expressions or in Verilog.

[1]  L. Ivanov,et al.  Formal verification: a new partial order approach , 1999, Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454).

[2]  L. Ivanov,et al.  Modeling and analysis of noniterated systems: an approach based upon series-parallel posets , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[3]  L. Ivanov,et al.  Formal verification of a microprocessor control , 2001, Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257).

[4]  Robert P. Kurshan,et al.  Computer-Aided Verification of Coordinating Processes: The Automata-Theoretic Approach , 2014 .

[5]  Ganesh Gopalakrishnan,et al.  A new partial order reduction algorithm for concurrent system verification , 1997 .

[6]  R. Nunna,et al.  Modeling and verification of iterated systems and protocols , 2001, Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257).

[7]  L. Ivanov,et al.  Formal Verification of Globally-Iterated/Locally-Non-Iterated Systems , 1999 .

[8]  L. Ivanov,et al.  Modeling and verification of cache coherence protocols , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[9]  Sérgio Vale Aguiar Campos,et al.  Symbolic Model Checking , 1993, CAV.

[10]  Glynn Winskel,et al.  Petri Nets, Event Structures and Domains , 1979, Semantics of Concurrent Computation.

[11]  Glynn Winskel,et al.  Petri Nets, Event Structures and Domains, Part I , 1981, Theor. Comput. Sci..

[12]  Doron A. Peled,et al.  Combining partial order reductions with on-the-fly model-checking , 1994, Formal Methods Syst. Des..

[13]  Kenneth L. McMillan,et al.  Symbolic model checking , 1992 .

[14]  Patrice Godefroid,et al.  Partial-Order Methods for the Verification of Concurrent Systems , 1996, Lecture Notes in Computer Science.

[15]  Lubomir Ivanov,et al.  FORMAL VERIFICATION OF MICROINSTRUCTION SEQUENCING , 2001 .

[16]  Zoltán Ésik,et al.  Free Shuffle Algebras in Language Varieties , 1996, Theor. Comput. Sci..