BPC permutations on the OTIS-Mesh optoelectronic computer

We show that the diameter of an N/sup 2/ processor OTIS-Mesh is 4/spl radic/(N-3). Two possible embeddings of an N/spl times/N mesh onto an OTIS-Mesh are evaluated. OTIS-Mesh algorithms for some commonly performed permutations-transpose, bit reversal, vector reversal, perfect shuffle, unshuffle, shuffled row-major, and bit shuffle-are developed. We also propose an algorithm for general BPC permutations.