Tight Chip Area Lower Bounds for Discrete Fourier and Walsh-Hadamard Transformations
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Abstract We prove tight linear lower bounds on the area of VLSI circuits for the problems of discrete Fourier and Walsh-Hadamard transformations of n k-bit elements.
[1] Louis M. Monier,et al. Optimality in VLSI , 1981 .
[2] J. Savage. Planar Circuit Complexity and The Performance of VLSI Algorithms , 1981 .
[3] C. Thomborson,et al. Area-time complexity for VLSI , 1979, STOC.
[4] Gérard M. Baudet. On the Area Required by VLSI Circuits , 1981 .
[5] Jeffrey D Ullma. Computational Aspects of VLSI , 1984 .
[6] H. T. Kung,et al. Systolic Arrays for (VLSI). , 1978 .