A study of current-reuse 800 MHz/1.9 GHz concurrent dual-band amplifier

Current-reuse concurrent 800 MHz / 1.9 GHz dual-band amplifier has been studied. Proposed amplifier consists of PMOS cascode amplifier and NMOS cascode amplifier with current-reuse topology and individual inductive source degeneration matching circuits to obtain sufficient input matching for both 800 MHz / 1.9 GHz. Measured |s11|, |s21|, and |s22| exhibit approximately -7 dB, 9 dB, and -5 dB at 800 MHz and -18 dB, 7 dB, and -11 dB at 1.9 GHz, respectively. IP1dB at 800 MHz is -24.6 dBm and that at 1.9 GHz was -13.6 dBm, also, IP2 showed approximately -32 dBc and IP3 at 3 GHz is approximately -48 dBc. Chip is fabricated using 65 nm standard CMOS process with UTM and total power consumption is 10.8 mW.