Probabilistic Error Modeling for Approximate Adders
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Muhammad Shafique | Jörg Henkel | Osman Hasan | Rehan Hafiz | Sana Mazahir | J. Henkel | Sana Mazahir | M. Shafique | R. Hafiz | O. Hasan
[1] Yi-Ming Yang,et al. High-Performance Low-Power Carry Speculative Addition With Variable Latency , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[2] Fabrizio Lombardi,et al. A Comparative Review and Evaluation of Approximate Adders , 2015, ACM Great Lakes Symposium on VLSI.
[3] Gang Wang,et al. Enhanced low-power high-speed adder for error-tolerant application , 2009, 2010 International SoC Design Conference.
[4] Fabrizio Lombardi,et al. A low-power, high-performance approximate multiplier with configurable partial error recovery , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[5] Jie Han,et al. Approximate computing: An emerging paradigm for energy-efficient design , 2013, 2013 18th IEEE European Test Symposium (ETS).
[6] Fabrizio Lombardi,et al. An Analytical Framework for Evaluating the Error Characteristics of Approximate Adders , 2015, IEEE Transactions on Computers.
[7] A. Leon-Garcia,et al. Probability, statistics, and random processes for electrical engineering , 2008 .
[8] Kartikeya Bhardwaj,et al. Power- and area-efficient Approximate Wallace Tree Multiplier for error-resilient systems , 2014, Fifteenth International Symposium on Quality Electronic Design.
[9] Andreas Gerstlauer,et al. Approximate logic synthesis under general error magnitude and frequency constraints , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[10] Kaushik Roy,et al. Low-Power Digital Signal Processing Using Approximate Adders , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[11] Kaushik Roy,et al. MACACO: Modeling and analysis of circuits for approximate computing , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[12] Shih-Lien Lu. Speeding Up Processing with Approximation Circuits , 2004, Computer.
[13] Kaushik Roy,et al. Substitute-and-simplify: A unified design paradigm for approximate and quality configurable circuits , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[14] Fabrizio Lombardi,et al. Approximate XOR/XNOR-based adders for inexact computing , 2013, 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013).
[15] Paolo Ienne,et al. Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design , 2008, 2008 Design, Automation and Test in Europe.
[16] Ku He,et al. Modeling and synthesis of quality-energy optimal approximate adders , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[17] Andrew B. Kahng,et al. Accuracy-configurable adder for approximate arithmetic designs , 2012, DAC Design Automation Conference 2012.
[18] Puneet Gupta,et al. Trading Accuracy for Power in a Multiplier Architecture , 2011, J. Low Power Electron..
[19] Rakesh Kumar,et al. On reconfiguration-oriented approximate adder design and its application , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[20] Yang Liu,et al. Computation Error Analysis in Digital Signal Processing Systems With Overscaled Supply Voltage , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[21] Peter J. Varman,et al. High performance reliable variable latency carry select addition , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[22] Zhi-Hui Kong,et al. Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[23] Muhammad Shafique,et al. An area-efficient consolidated configurable error correction for approximate hardware accelerators , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[24] Muhammad Shafique,et al. A low latency generic accuracy configurable adder , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[25] Kaushik Roy,et al. IMPACT: IMPrecise adders for low-power approximate computing , 2011, IEEE/ACM International Symposium on Low Power Electronics and Design.
[26] Fabrizio Lombardi,et al. New Metrics for the Reliability of Approximate and Probabilistic Adders , 2013, IEEE Transactions on Computers.
[27] Antonio Ortega,et al. NEW QUALITY METRICS FOR MULTIMEDIA COMPRESSION USING FAULTY HARDWARE In , 2006 .