New standby–current reduction technique for deep sub–micron VLSI CMOS circuits: Smart series switch

A new sub-threshold current reduction technique is presented: The smart-series-switch technique. It provides for a reduction of up to 5 decades of the sub-threshold leakage current without loosing the state information. This technique is still effective in deep sub-micron processes in which the conventional methods are not effective any longer. Its effectiveness and costs are demonstrated in a 0.25 µm dual-V th process with designs of representative circuits: latch, flip-flop, ring-oscillator and a shift register.