Two-dimensional device simulation program: 2DP

Mathematical details of a two-dimensional semiconductor device simulation program are presented, Applicability of the carrier transport model to shallow junction bipolar transistors is discussed. Use of this program to optimize device structures in new bipolar technology is illustrated by presenting calculated device characteristics for variations in a few selected process conditions, Software links that automatically transfer data from a two-dimensional process simulation program and to a quasi-three-dimensional device equivalent circuit model generation program are also discussed.

[1]  S. Gaur,et al.  Performance limitations of silicon bipolar transistors , 1979, IEEE Transactions on Electron Devices.

[2]  F.Y. Chang,et al.  Statistical modeling of submicron, shallow-junction, self-aligned bipolar transistors , 1982, 1982 International Electron Devices Meeting.

[3]  S. P. Gaur,et al.  Two-dimensional analysis of high-voltage power transistors , 1977 .

[4]  Ronald W. Knepper,et al.  Two-dimensional process modeling: a description of the SAFEPRO program , 1985 .

[5]  S.P. Gaur,et al.  Verification of heavy doping parameters in semiconductor device modeling , 1980, 1980 International Electron Devices Meeting.

[6]  C. Jacoboni,et al.  A review of some charge transport properties of silicon , 1977 .

[7]  D.H. Navon,et al.  Monte Carlo simulation of bipolar transistors , 1984, IEEE Transactions on Electron Devices.

[8]  S. Gaur,et al.  The effects of carrier-concentration-dependent bandgap narrowing on bipolar-device characteristics , 1985, IEEE Transactions on Electron Devices.

[9]  D.H. Navon,et al.  Two-dimensional carrier flow in a transistor structure under nonisothermal conditions , 1976, IEEE Transactions on Electron Devices.

[10]  Ronald W. Knepper,et al.  Advanced bipolar transistor modeling: process and device simulation tools for today's technology , 1985 .

[11]  H. Gummel A self-consistent iterative scheme for one-dimensional steady state transistor calculations , 1964 .

[12]  D. R. Decker,et al.  Temperature dependence of carrier ionization rates and saturated velocities in silicon , 1975 .

[13]  J. Hauser,et al.  Electron and hole mobilities in silicon as a function of concentration and temperature , 1982, IEEE Transactions on Electron Devices.

[14]  R. K. Cook,et al.  Numerical simulation of hot-carrier transport in silicon bipolar transistors , 1983, IEEE Transactions on Electron Devices.

[15]  E. M. Buturla,et al.  Simulation of semiconductor transport using coupled and decoupled solution techniques , 1980 .

[16]  L. F. Wagner,et al.  The generation of three-dimensional bipolar transistor models for circuit analysis , 1985 .

[17]  D.H. Navon,et al.  Time-dependent carrier flow in a transistor structure under nonisothermal conditions , 1977, IEEE Transactions on Electron Devices.