Design of a high performance CNTFET-based full adder cell applicable in: Carry ripple, carry select and carry skip adders

Abstract Carbon Nanotube Field Effect Transistor (CNTFET)s are applied instead of silicon transistors to conquer the constraint of MOSFETs in nano-scale, with improving the power consumption and performance. Full adder is one of the basic arithmetic operations to construct large computing systems like multiplication. Due to its widespread application, its optimal design with CNTFET technology is very useful. The contribution here is to propose a high performance CNTFET-based full adder which optimizes the delay and PDP in relation to the previous works in different voltage supply and load capacitance. To show the performance and applicability of this proposed design in large computing systems, three different carry ripple, skip and select adders, all with 4, 8 and 16 size bits are designed and simulated through HSPICE and 32 nm CNTFET technology. The obtained results indicate the advantage of this proposed CNTFET-based full adder.

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