论文信息 - A hardware-in-the-loop simulation environment for real-time systems development and architecture evaluation

A hardware-in-the-loop simulation environment for real-time systems development and architecture evaluation

In this paper, we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the-loop simulation. The environment to support this technology is described. This environment also enables simulation-based development of RTES software and evaluation of RTES architecture on early stages of RTES development.

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