Design of an input matching network for RF CMOS LNAs using stack inductors

This paper presents a low noise amplifier (LNA) with an input impedance matching technique using mutual coupled stack inductors. Two different input matching methodologies using mutual inductors are evaluated in terms of their effect on the gain and NF of RF CMOS LNAs in 2.4 GHz. Design guidelines to improve the gain-NF performance of CMOS LNAs are developed by means of analytical expressions. Moreover, it is demonstrated that the NF of the LNA can be minimized in negative mutual coefficient methods by properly choosing the size of the active and passive components. A 2.5-GHz global system for Bluetooth communication LNA using this technique is designed and simulated using 0.35-um standard 2P4M complementary metal oxide semiconductor technology. It achieves an 18-dB gain, 2.47-dB noise figure, and -5.2-dBm input referred IIP3 with -100m for coupling coefficient. The LNA draws 6.4 mA from a single 3.3-V power supply.

[1]  R. J. Weber,et al.  A 2.4GHz sub-1 dB CMOS low noise amplifier with on-chip interstage inductor and parallel intrinsic capacitor , 2002, Proceedings RAWCON 2002. 2002 IEEE Radio and Wireless Conference (Cat. No.02EX573).

[2]  Pietro Andreani,et al.  Noise optimization of an inductively degenerated CMOS low noise amplifier , 2001 .

[3]  Hung-Wei Chiu,et al.  A 2.17-dB NF 5-GHz-band monolithic CMOS LNA with 10-mW DC power consumption , 2005, IEEE Transactions on Microwave Theory and Techniques.

[4]  Huey-Ru Chuang,et al.  A 5.7-GHz 0.18-μm CMOS gain-controlled differential LNA with current reuse for WLAN receiver , 2003 .

[5]  D. J. Cassan,et al.  A 1 V 0.9 dB NF low noise amplifier for 5-6 GHz WLAN in 0.18 /spl mu/m CMOS , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[6]  H.R. Rategh,et al.  A 5-GHz CMOS wireless LAN receiver front end , 2000, IEEE Journal of Solid-State Circuits.

[7]  Dimitri Linten,et al.  A 5 GHz fully integrated ESD-protected low-noise amplifier in 90 nm RF CMOS , 2004 .

[8]  H. Samavati,et al.  5-GHz CMOS wireless LANs , 2002 .

[9]  F. Ellinger,et al.  High-Q inductors on digital VLSI CMOS substrate for analog RF applications , 2003, Proceedings of the 2003 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference - IMOC 2003. (Cat. No.03TH8678).

[10]  Shey-Shi Lu,et al.  A 2.17 dB NF, 5 GHz band monolithic CMOS LNA with 10 mW DC power consumption , 2002, VLSIC 2002.

[11]  T.H. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.

[12]  Mourad N. El-Gamal,et al.  Very low-voltage (0.8V) CMOS receiver frontend for 5 GHz RF applications , 2002 .

[13]  Mou Shouxian,et al.  A modified architecture used for input matching in CMOS low-noise amplifiers , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

[14]  P. Wambacq,et al.  A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS , 2004, IEEE Journal of Solid-State Circuits.

[15]  Yeo Kiat Seng,et al.  A modified architecture used for input matching in CMOS low-noise amplifiers , 2005 .

[16]  Huey-Ru Chuang,et al.  A 5.7-GHz 0.18-μm CMOS gain-controlled differential LNA with current reuse for WLAN receiver , 2003, IEEE Microwave and Wireless Components Letters.

[17]  Wong-Sun Kim,et al.  A 2.4 GHz CMOS low noise amplifier using an inter-stage matching inductor , 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

[18]  P. Wambacq,et al.  Low-power 5 GHz LNA and VCO in 90 nm RF CMOS , 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).

[19]  L.-H. Lu,et al.  5.7 GHz low-power variable-gain LNA in 0.18 [micro sign]m CMOS , 2005 .