Evaluation of vectorization potential of Graph500 on Intel's Xeon Phi
暂无分享,去创建一个
Mateo Valero | Osman S. Unsal | Adrián Cristal | Milan Stanic | Oscar Palomar | Ivan Ratkovic | Milovan Duric | M. Valero | O. Unsal | A. Cristal | Oscar Palomar | Milan Stanic | Ivan Ratković | M. Duric
[1] Brian W. Barrett,et al. Introducing the Graph 500 , 2010 .
[2] Edward T. Grochowski,et al. Larrabee: A many-Core x86 architecture for visual computing , 2008, 2008 IEEE Hot Chips 20 Symposium (HCS).
[3] George Ho,et al. PAPI: A Portable Interface to Hardware Performance Counters , 1999 .
[4] Ümit V. Çatalyürek,et al. An Early Evaluation of the Scalability of Graph Algorithms on the Intel MIC Architecture , 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.
[5] David A. Bader,et al. Scalable Graph Exploration on Multicore Processors , 2010, 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis.
[6] Min Zhou,et al. Experiences and lessons learned with a portable interface to hardware performance counters , 2003, Proceedings International Parallel and Distributed Processing Symposium.
[7] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .
[8] Kunle Olukotun,et al. Efficient Parallel Graph Exploration on Multi-Core CPU and GPU , 2011, 2011 International Conference on Parallel Architectures and Compilation Techniques.