Silicon VLSI processing architectures incorporating integrated optoelectronic devices

Integrated optoelectronic interconnects offer a potentially lower cost, higher density alternative to wire-based technologies for I/O and inter-chip communication. This paper outlines two systems being designed at Georgia Tech which incorporate integrated thin film optoelectronic devices onto high throughput VLSI digital processors. The first system places an array of thin film detectors on top of SIMD processing elements allowing direct area connections between sensors and processors. This allows extremely fast frame processing rates (1-10 thousand frames per second) which are required in high speed and scanned imaging systems. The second system presented incorporates inter-chip IR optoelectronic channels which pass transparently through silicon. These links allow communication between three dimensionally stacked chips supporting high throughput interconnect topologies. This paper demonstrates the potential of optoelectronic integrated VLSI systems for providing extremely dense and lightweight solutions in applications such as image processing.

[1]  Eric R. Fossum,et al.  Real-Time Focal-Plane Array Image Processor , 1990, Other Conferences.

[2]  D. Rogers,et al.  Monolithic integration of a 3-GHz detector/preamplifier using a refractory-gate, ion-implanted MESFET process , 1986, IEEE Electron Device Letters.

[3]  Martin A. Brooke,et al.  Design, fabrication, and test of a 125 Mb/s transimpedance amplifier using MOSIS 1.2 /spl mu/m standard digital CMOS process , 1994, Proceedings of 1994 37th Midwest Symposium on Circuits and Systems.

[4]  M. J. Little,et al.  Reliability of the 3-D computer under stress of mechanical vibration and thermal cycling , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[5]  D. Scott Wills,et al.  The Offset Cube: An Optoelectronic Interconnection Network , 1994, PCRCW.

[6]  C. Camperi-Ginestet,et al.  High density focal plane signal processing using 3-D vertical interconnects , 1994, Proceedings of 1994 37th Midwest Symposium on Circuits and Systems.

[7]  Demetri Psaltis,et al.  Comparison Of Si/CMOS And GaAs MESFET Technologies For Analog Optoelectronic Circuits , 1994, Proceedings of IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics.

[8]  C. Camperi-Ginestet,et al.  Alignable epitaxial liftoff of GaAs materials with selective deposition using polyimide diaphragms , 1991, IEEE Photonics Technology Letters.

[9]  J. G. Nash,et al.  The 3-D Computer , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[10]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[11]  H.-M. Rein,et al.  Bipolar high-gain limiting amplifier IC for optical-fiber receivers operating up to 4 Gbit/s , 1987 .

[12]  Michael D. Noakes,et al.  System design of the J-Machine , 1990 .

[13]  N. Jokerst,et al.  Vertical optical communication through stacked silicon wafers using hybrid monolithic thin film InGaAsP emitters and detectors , 1993, IEEE Photonics Technology Letters.

[14]  C. Camperi-Ginestet,et al.  Silicon CMOS Optical Receiver Circuit With Integrated Compound Semiconductor Thin-film P-i-N Detector , 1994, Proceedings of IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics.