Mobile-oriented CPS (Chip-Package-System) integrated power integrity techniques at early chip design stage

Power integrity is one of the core technologies for achieving mobile products with high performance. However, we cannot prevent problems due to power noise without a prediction on an earlier stage and avoid considerable extra costs in solving the problems come up after the design of PDN(Power Delivery Network) finished. Therefore, most of PDN of mobile products is likely to be over or under-designed. In this paper, we propose the early stage integrated power integrity solution named of ECPS (Early Chip Package System) as a remedy of the solution to the limitation. The ECPS method enables the designer to prevent power noise as well as estimate power integrity of all PDNs of a chip, package and board in time and frequency domain on the early design stage without real PDN.