High Performance Image Processing on a Massively Parallel Processor Array
暂无分享,去创建一个
[1] Olivier Romain,et al. Entropy Coding on a Programmable Processor Array for Multimedia SoC , 2007 .
[2] Javier D. Bruguera,et al. Entropy Coding on a Programmable Processor Array for Multimedia SoC , 2007, 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP).
[3] Yazid M. Sharaiha,et al. Binary digital image processing - a discrete approach , 1999 .
[4] D. Huffman. A Method for the Construction of Minimum-Redundancy Codes , 1952 .
[5] G.M. Aly,et al. JPEG encoder for low-cost FPGAs , 2007, 2007 International Conference on Computer Engineering & Systems.
[6] Margaret Martonosi,et al. An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).
[7] Mike Butts,et al. Synchronization through Communication in a Massively Parallel Processor Array , 2007, IEEE Micro.
[8] V.M. Brea,et al. SIMD array on FPGA for B/W image processing , 2008, 2008 11th International Workshop on Cellular Neural Networks and Their Applications.
[9] Sergio Bampi,et al. High Throughput Architecture of JPEG Compressor for Color Images Targeting FPGAs , 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.