Optimized buffer allocation in multicore platforms

With the availability of advanced MPSoC and emerging Dynamic RAM (DRAM) interface technologies, an optimal allocation of logical data buffers to physical memory cannot be handled manually anymore due to the huge design space. An allocation does not only need to decide between an on-or off-chip memory, but also needs to take an increasing number of available memory channels, different bandwidth capacities and several routing possibilities into account. We formalize this problem and introduce a Mixed Integer Linear Programming (MILP) model based on two different optimization criteria. We implement the MILP model into a retargetable tool and present a case study with representative data of the Long-Term-Evolution (LTE) standard to show the real-life applicability of our approach.

[1]  Shiann-Rong Kuang,et al.  Multiport memory based data path allocation focusing on interconnection optimization , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[2]  Ahmed Amine Jerraya,et al.  An optimal memory allocation for application-specific multiprocessor system-on-chip , 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

[3]  Lester Randolph Ford,et al.  A Suggested Computation for Maximal Multi-Commodity Network Flows , 2004, Manag. Sci..

[4]  D. R. Fulkerson,et al.  Constructing Maximal Dynamic Flows from Static Flows , 1958 .

[5]  Kwangsoo Seo,et al.  Allocation of multiport memories in ASIC data path synthesis , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[6]  Alon Itai,et al.  On the complexity of time table and multi-commodity flow problems , 1975, 16th Annual Symposium on Foundations of Computer Science (sfcs 1975).

[7]  Cynthia Barnhart,et al.  Integer Muticommodity Flow Problems , 1996, IPCO.

[8]  Mahmut T. Kandemir,et al.  An integer linear programming based approach to simultaneous memory space partitioning and data allocation for chip multiprocessors , 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).