Reducing the effects of component mismatch by using relative size information
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[1] P.R. Gray,et al. A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR , 2004, IEEE Journal of Solid-State Circuits.
[2] Narayanaswamy Balakrishnan,et al. Order statistics and inference , 1991 .
[3] Bang-Sup Song,et al. A 13b linear 40MS/s pipelined ADC with self-configured capacitor matching , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
[4] Un-Ku Moon,et al. A Sub 1-V Constant $G_{m}$– $C$ Switched-Capacitor Current Source , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.
[5] Stephen H. Lewis,et al. A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers , 1997, IEEE J. Solid State Circuits.
[6] P. R. Gray,et al. A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter , 1999, IEEE J. Solid State Circuits.
[7] M.J.M. Pelgrom,et al. Matching properties of MOS transistors , 1989 .
[8] Bang-Sup Song,et al. Digital-domain calibration of multistep analog-to-digital converters , 1992 .
[9] Randall L. Geiger,et al. Switching sequence optimization for gradient error compensation in thermometer-decoded DAC arrays , 2000 .
[10] R. Baird,et al. Linearity enhancement of multibit /spl Delta//spl Sigma/ A/D and D/A converters using data weighted averaging , 1995 .
[11] Marcel J. M. Pelgrom,et al. Matching properties of MOS transistors , 1989 .