In 2002, we reported a CCD image sensor with 260×312 pixels capable of capturing 103 consecutive images at 1,000,000 frames per second (1Mfps) [1]. We named the sensor “ISIS-V2”, for In-situStorage Image Sensor Version 2. 103 memory elements are attached to every pixel; generated image signals were instantly and continuously stored in the in-situstorage without being read out of the sensor. The ultimate high-speed recording was enabled by this parallel recording at all pixels. In 2006, the color version, ISIS-V4, was reported [2]. In 2009, we developed ISIS-V12, a backside-illuminated image sensor mounting the ISIS structure and the CCM, charge-carrier multiplication, on the front side [3]. The CCM is a CCD-specific efficient signal-amplification device. CCM, combined with the BSI structure and cooling, achieved very high sensitivity. The ISIS-V12 was a test sensor intended to prove the technical feasibility of the structure. The maximum frame rate was 250kfps for a charge-handling capacity of Qmax=10,000e− and 1Mfps for a reduced Qmax. The pixel count was 489×400 pixels. For backside-illuminated (BSI) image sensors, metal wires can be placed on the front surface to increase the frame rate without reducing fill factor or violating uniformity of the pixel configuration. It has been proved by simulations that 100Mfps is achievable by introducing innovative technologies including a special wiring method [4]. We now report on ISIS-V16, developed by incorporating technologies to increase the frame rate with those to achieve very high sensitivity, which was confirmed by evaluation of ISIS-V12. The performance specification of ISIS-V16 is summarized in Fig. 23.4.1.
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