EMI-Resistant CMOS Differential Input Stages

This paper studies and compares the performances of CMOS differential input stages with a high degree of immunity against electromagnetic interferences (EMIs) and introduces a source-buffered differential pair which is very resistant to EMI coupled at its inputs. The EMI behavior of this source-buffered differential-pair topology has been evaluated with a test chip: When injecting an EMI signal of 750 mV rms at the input terminals, the measured maximal EMI-induced input offset voltage corresponds to 116 mV for the source-buffered topology compared with 610 mV for the classic differential pair, which constitutes a major improvement.

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