Functional testing of TFT/LCD arrays

Introduction Of all the flat-panel technologies, only the TFT/LCD is expected to pose a serious challenge to the cathode ray tube [1]. TFT/LCD prototypes have already demonstrated full color capability, a requirement of high-informationcontent displays. TFT/LCDs also have an inherent immunity to high ambient light levels while operating at low levels of power consumption, a characteristic not shared by electroluminescent or plasma displays. Many companies have recognized the advantages of the TFT/LCD, and the total investment in this technology is now approaching two billion dollars [2]. TFT/LCD technology shares many similarities with silicon integrated circuit technology, such as djoiamic random access memories (DRAMs). Both involve film deposition, although TFT/LCD technologies employ lowertemperature processing. In both, photolithography and etching are used to pattern each level. Both structures employ random addressing capability. Many characterization and yield management techniques are also applicable to both. The operating mode of a TFT/LCD is not digital, however, but analog, because the light output varies as a smooth function of the voltage stored [3]. Therefore, functional testing of TFT/LCDs is much different, as will be seen. There is growing interest in testing and repair techniques for these displays [4-8]. We have developed a Dynamic Array Tester that characterizes TFT arrays. The Dynamic Array Tester can detect, locate, and grade both line faults and pixel faults in a TFT array. It can be used as an in-line manufacturing screen to sort product into pass, fail, or repair categories, and this sorting can be done immediately after the arrays have been fabricated and again after the display has been filled with liquid crystal. It can also be used to verify array designs and perform failure analysis.