Impact of chip package interaction on Cu/Ultra low-k interconnect delamination in Flip Chip Package with large die
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[1] Sidharth,et al. Investigation of Cu/low-k film delamination in flip chip packages , 2006, 56th Electronic Components and Technology Conference 2006.
[2] L. L. Mercado,et al. Impact of flip-chip packaging on copper/low-k structures , 2003 .
[3] Paul S. Ho,et al. Chip‐Packaging Interaction and Reliability Impact on Cu/Low k Interconnects , 2006 .
[4] N. Aoi,et al. Evaluation and analysis for mechanical strengths of low k dielectrics by a finite element method , 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).
[5] P. Ho,et al. Effects of Chip-Package Interaction on Mechanical Reliability of Cu Interconnects for 65nm Technology Node and Beyond , 2006, 2006 International Interconnect Technology Conference.
[6] Paul S. Ho,et al. Packaging effects on reliability of Cu/low-k interconnects , 2003 .
[7] P. Ho,et al. Investigation of Interconnect Design on Chip Package Interaction and Mechanical Reliability of Cu/Low-k Multi-Layer Interconnects in Flip Chip Package , 2008, 2008 International Interconnect Technology Conference.
[8] S. Pozder,et al. Analysis of flip-chip packaging challenges on copper/low-k interconnects , 2003 .
[9] Ephraim Suhir,et al. Interfacial Stresses in Bimetal Thermostats , 1989 .