Detecting I/O and Internal Feedback Bridging Faults

The testing of bridging faults (short circuits) has become increasingly important with the increasing density in VLSI (very large scale integration) chips. Yet very little work has been done in this area. In this correspondence, based on a two-state sequential machine model, we present the conditions for a circuit with feedback bridgings to oscillate and to exhibit stable sequential behavior. It is shown that only two test patterns are sufficient to detect feedback bridging faults between input and output lines of a general combinational network. We derive a simple equation to generate test patterns for detecting feedback bridging faults among internal lines of a general combinational network.