Bit-Sequential Arithmetic for Parallel Processors
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[1] Daniel L. Slotnick,et al. The SOLOMON computer , 1962, AFIPS '62 (Fall).
[2] A. J. Atrubin. A One-Dimensional Real-Time Iterative Multiplier , 1965, IEEE Trans. Electron. Comput..
[3] Domenico Ferrari,et al. A Division Method Using a Parallel Multiplier , 1967, IEEE Trans. Electron. Comput..
[4] Donald Ervin Knuth,et al. The Art of Computer Programming , 1968 .
[5] Michael J. Flynn. On Division by Functional Iteration , 1970, IEEE Transactions on Computers.
[6] Michael J. Flynn,et al. Some Computer Organizations and Their Effectiveness , 1972, IEEE Transactions on Computers.
[7] Milos D. Ercegovac,et al. On-Line Algorithms for Division and Multiplication , 1977, IEEE Transactions on Computers.
[8] Sudhir Ahuja,et al. Effective Pipelining of Digital Systems , 1978, IEEE Transactions on Computers.
[9] Earl E. Swartzlander,et al. Inner Product Computers , 1978, IEEE Transactions on Computers.
[10] Dharma P. Agrawal,et al. On Multiple Operand Addition of Signed Binary Numbers , 1978, IEEE Transactions on Computers.
[11] Dharma P. Agrawal. High-Speed Arithmetic Arrays , 1979, IEEE Transactions on Computers.
[12] John V. Blankenbaker. Comments on "Inner Product Computers" , 1979, IEEE Trans. Computers.
[13] I-Ngo Chen,et al. An 0(n) Parallel Multiplier with Bit-Sequential Input and Output , 1979, IEEE Transactions on Computers.
[14] Kai Hwang,et al. Computer arithmetic: Principles, architecture, and design , 1979 .
[15] Signal processing with systolic arrays , 1981 .
[16] Walter J. Karplus,et al. Architectural and Software Issues in the Design and Application of Peripheral Array Processors , 1981, Computer.
[17] Gregory L. Zick,et al. The Expression Processor: A Pipelined, Multiple- Processor Architecture , 1981, IEEE Transactions on Computers.
[18] Mark A. Franklin,et al. VLSI Performance Comparison of Banyan and Crossbar Communications Networks , 1981, IEEE Transactions on Computers.
[19] Daniel Gajski,et al. An Algorithm for Solving Linear Recurrence Systems on Parallel and Pipelined Machines , 1981, IEEE Transactions on Computers.
[20] Henk J. Sips. Comments on "An O(n) Parallel Multiplier with Bit-Sequential Input and Output" , 1982, IEEE Trans. Computers.
[21] Kenneth E. Batcher,et al. Bit-Serial Parallel Processing Systems , 1982, IEEE Transactions on Computers.
[22] Milos D. Ercegovac,et al. An On-Line Square Root Algorithm , 1982, IEEE Transactions on Computers.