Methodology to Estimate Robustness of Layouts of Radiation Hardened Flip-Flops to High Energy Radiations

In this paper, a methodology to quickly estimate robustness of circuits is proposed and a layout oriented SPICE simulation has been used to analyze the radiation tolerance of various flip-flops in 90nm BCD technology. The proposed methodology considers nearby sensitive nodes which also partic-ipate in charge collection mechanism along with the main victim node. The radiation modelling has been further improved by including incident angle of the radiation for varying its linear energy of transfer. We demonstrated that the distance between two nearby nodes affects the critical charge required for data flipping. Also, the tool identifies location of nodes at which particle strike can lead to data flip. The proposed method enables fast iterative design of layouts of critical storage elements. Finally, we design multiple flip-flops and compare them on the basis of their robustness, power dissipation, propagation delay, and area to select an application domain for each flip-flop.