A Contribution to Advanced Extraction Methods for Static ADC Non-linearity

One of the recent approaches for A/D converter performance extraction is the so-called Servo-Loop method. In this paper, we build an improved version of this method targeted to full transistor-level circuit simulation of static integral and differential non-linearity. In comparison with the conventional implementation, the Servo-Loop version proposed was enhanced by a powerful search algorithm. Subsequently, this paper deals with the description of a versatile Servo-Looper tool developed in Verilog-A language suitable for direct co-operation with most of the analog and mixed-signal simulators used in industry. Powerful capabilities of the proposed Servo-Looper tool were successfully confirmed by a large simulation set performed on a full custom ADC design example. The presented paper brings the most significant results of the ADC simulation procedure.

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