Realistic single-electron transistor modeling and novel CMOS/SET hybrid circuits
暂无分享,去创建一个
Ki-Whan Song | Byung-Gook Park | Jong Duk Lee | Dae Hwan Kim | Dong-Soo Woo | Jae Sung Sim | Sang Hoon Lee | Kyung Rok Kim | Gwanghyeon Baek
[1] Byung-Gook Park,et al. A practical SPICE model based on the physics and characteristics of realistic single-electron transistors , 2002 .
[2] Yasuo Takahashi,et al. Suppression of Effects of Parasitic Metal-Oxide-Semiconductor Field-Effect Transistors on Si Single-Electron Transistors , 1998 .
[3] V. L. Rideout,et al. Very small MOSFET's for low-temperature operation , 1977, IEEE Transactions on Electron Devices.
[4] Takashi Yamada,et al. Multiple-Valued Inverter Using a Single-Electron-Tunneling Circuit (Special Issue on Integrated Electronics and New System Paradigms) , 1999 .
[5] K. Matsuzawa,et al. Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits , 2000 .
[6] H. Inokawa,et al. A multiple-valued logic with merged single-electron and MOS transistors , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).
[7] Byung-Gook Park,et al. Si single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).
[8] Yun Seop Yu,et al. Macromodeling of single-electron transistors for efficient circuit simulation , 1999 .