Stitch-Aware Routing Considering Smart Boundary for Multiple E-Beam Lithography

As one of competitive next generation lithography (NGL), multiple electron beam lithography (MEBL) has been proposed to improve the low throughput issue. For this maskless lithography, each field is split into stripes that are slightly overlapped with each other, and each stripe of layout patterns is written by a single electron beam (e-beam). If a pattern lies on an overlapped region (stitching region) of two neighboring stripes, it can be written by either of the two e-beams, which is known as smart boundary. To avoid layout features written by more than one e-beam and thus suffering from the overlay error between different beams, we propose a full-chip router utilizing smart boundary to minimize stitch-sensitive patterns. Experimental results show that the proposed algorithm can produce stitch-friendly routing solutions and thus greatly improve MEBL manufacturability and yield.

[1]  G. de Boer,et al.  MAPPER: high throughput maskless lithography , 2008, SPIE Advanced Lithography.

[2]  Hai Zhou,et al.  Track assignment: a desirable intermediate step between global routing and detailed routing , 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

[3]  Pieter Brandt,et al.  Demonstration of EDA flow for massively parallel e-beam lithography , 2014, Advanced Lithography.

[4]  Jiang Hu,et al.  Antenna avoidance in layer assignment , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  D. T. Lee,et al.  Crosstalk- and performance-driven multilevel full-chip routing , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  David Z. Pan,et al.  Stitch aware detailed placement for multiple e-beam lithography , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

[7]  A. Hashimoto,et al.  Wire routing by optimizing channel assignment within large apertures , 1971, DAC '71.

[8]  Burn Jeng Lin Future of multiple-e-beam direct-write systems , 2012 .

[9]  Yao-Wen Chang,et al.  A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[10]  Charles T. Rettner,et al.  REBL: design progress toward 16 nm half-pitch maskless projection electron beam lithography , 2012, Advanced Lithography.

[11]  Nils J. Nilsson,et al.  A Formal Basis for the Heuristic Determination of Minimum Cost Paths , 1968, IEEE Trans. Syst. Sci. Cybern..

[12]  Yao-Wen Chang,et al.  Stitch-Aware Routing for Multiple E-Beam Lithography , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  G. de Boer,et al.  MAPPER: progress toward a high-volume manufacturing system , 2013, Advanced Lithography.

[14]  Majid Sarrafzadeh,et al.  Pattern routing: use and theory for increasing predictability andavoiding coupling , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  C. Hohle,et al.  PML2: the maskless multibeam solution for the 22nm node and beyond , 2009, Advanced Lithography.

[16]  Yao-Wen Chang,et al.  Full-Chip Routing Considering Double-Via Insertion , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[17]  G. de Boer,et al.  MAPPER: high-throughput maskless lithography , 2010, Advanced Lithography.