A 125-MHz CMOS mixed-signal equalizer for Gigabit Ethernet on copper wire

A discrete-time mixed-signal linear equalizer designed for the analog front end of Gigabit Ethernet receivers performs cable equalization while relaxing the A/D converter complexity. Based on a coefficient-rotating FIR filter architecture, the circuit incorporates 8 taps that are adapted to the cable characteristics by means of an LMS algorithm. A distributed array of interleaved sampling circuits and a linear low-voltage multiplier topology allow both high speed and low power dissipation. Fabricated in a 0.25-/spl mu/m digital CMOS technology, the equalizer operates at 125 MHz while dissipating 75 mW from a 2.5-V power supply.

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