Low-power programmable gain CMOS distributed LNA

A design methodology for low power MOS distributed amplifiers (DAs) is presented. The bias point of the MOS devices is optimized so that the DA can be used as a low-noise amplifier (LNA) in broadband applications. A prototype 9-mW LNA with programmable gain was implemented in a 0.18-/spl mu/m CMOS process. The LNA provides a flat gain, S/sub 21/, of 8 /spl plusmn/ 0.6dB from DC to 6.2 GHz, with an input impedance match, S/sub 11/, of -16 dB and an output impedance match, S/sub 22/, of -10 dB over the entire band. The 3-dB bandwidth of the distributed amplifier is 7GHz, the IIP3 is +3 dBm, and the noise figure ranges from 4.2 to 6.2 dB. The gain is programmable from -10 dB to +8 dB while gain flatness and matching are maintained.

[1]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[2]  Brian Ellis.  The Design of CMOS Radio-Frequency Integrated Circuits , 2004 .

[3]  Calvin Plett,et al.  RF circuit implications of moderate inversion enhanced linear region in MOSFETs , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[4]  J. M. Rochelle,et al.  A CAD methodology for optimizing transistor current and sizing in analog CMOS design , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Peter H. Ladbrooke,et al.  MMIC Design GaAs FETs and HEMTs , 1989 .

[6]  R. Gharpurey.  A broadband low-noise front-end amplifier for ultra wideband in 0.13-/spl mu/m CMOS , 2004, IEEE Journal of Solid-State Circuits.

[7]  Kuo-Liang Deng,et al.  A 0.6-22-GHz broadband CMOS distributed amplifier , 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

[8]  Payam Heydari,et al.  A performance optimized CMOS distributed LNA for UWB receivers , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[9]  Gabor C. Temes,et al.  First-order sensitivity and worst case analysis of doubly terminated reactance two-ports , 1973 .

[10]  Kuo-Liang Deng,et al.  A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier , 2003, 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408).

[11]  P. Kinget,et al.  Low power programmable-gain CMOS distributed LNA for ultra-wideband applications , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..

[12]  Ranjit Gharpurey.  A broadband low-noise front-end amplifier for ultra wideband in 0.13 μm CMOS , 2004, CICC.

[13]  A.A. Abidi,et al.  A 3-10-GHz low-noise amplifier with wideband LC-ladder matching network , 2004, IEEE Journal of Solid-State Circuits.

[14]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[15]  Thomas Wong,et al.  Fundamentals of distributed amplification , 1993 .

[16]  A. Bevilacqua,et al.  An ultrawideband CMOS low-noise amplifier for 3.1-10.6-GHz wireless receivers , 2004, IEEE Journal of Solid-State Circuits.

[17]  C. S. Aitchison,et al.  The Intrinsic Noise Figure of the MESFET Distributed Amplifier , 1985 .

[18]  C. Yue,et al.  On-chip Spiral Inductors With Patterned Ground Shields For Si-based RF IC's , 1997, Symposium 1997 on VLSI Circuits.