Electrical Characterization of FDSOI by Capacitance Measurements in Gated p-i-n Diodes

The versatility of split capacitance measurements on the standard SOI gated p-i-n diodes is presented and discussed. The presence of both n+- and p+-type contacts in the same structure eliminates the floating-body and transient effects, and stands as a major advantage over the conventional MOSFETs characterization. We demonstrate the feasibility of simultaneous electrical (threshold voltage for n- and p-channels) and structural (layer thickness) parameter extraction by systematic measurements and TCAD numerical simulations.

[1]  O. Rozeau,et al.  Multi-$V_{T}$ UTBB FDSOI Device Architectures for Low-Power CMOS Circuit , 2011, IEEE Transactions on Electron Devices.

[2]  A. C. Diebold,et al.  Spectroscopic ellipsometry characterization of ultrathin silicon-on-insulator films , 2006 .

[3]  Juin J. Liou,et al.  A review of recent MOSFET threshold voltage extraction methods , 2002, Microelectron. Reliab..

[4]  V. P. Melnik,et al.  Ellipsometric studies of SOI structures , 1998, 1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351).

[6]  J. Chen,et al.  A CV technique for measuring thin SOI film thickness , 1991, IEEE Electron Device Letters.

[7]  Sorin Cristoloveanu,et al.  Adaptation of the charge pumping technique to gated p-i-n diodes fabricated on silicon on insulator , 1991 .

[8]  C. G. Sodini,et al.  Charge accumulation and mobility in thin dielectric MOS transistors , 1982 .

[9]  S. Okhonin,et al.  A capacitor-less 1T-DRAM cell , 2002, IEEE Electron Device Letters.

[10]  J. Cluzel,et al.  Fully Depleted SOI Characterization by Capacitance Analysis of p-i-n Gated Diodes , 2015, IEEE Electron Device Letters.

[11]  Michael S. Shur,et al.  A unified current-voltage model for long-channel nMOSFETs , 1991 .

[12]  Sorin Cristoloveanu,et al.  Recombination current modeling and carrier lifetime extraction in dual-gate fully-depleted SOI devices , 1999 .

[13]  Gerard Ghibaudo,et al.  New method for the extraction of MOSFET parameters , 1988 .

[14]  D. Schroder Series Resistance, Channel Length and Width, and Threshold Voltage , 2006 .

[15]  Frederic Boeuf,et al.  New parameter extraction method based on split C-V measurements in FDSOI MOSFETs , 2013 .

[16]  Chun-Yen Chang,et al.  Impacts of gate structure on dynamic threshold SOI nMOSFETs , 2002, IEEE Electron Device Letters.

[17]  O. Faynot,et al.  Floating-body kinks and dynamic effects in fully depleted SOI MOSFETs , 1995, 1995 IEEE International SOI Conference Proceedings.

[18]  Hyung-Kyu Lim,et al.  Threshold voltage of thin-film Silicon-on-insulator (SOI) MOSFET's , 1983, IEEE Transactions on Electron Devices.

[19]  Antoine Cros,et al.  Full split C–V method for parameter extraction in ultra thin BOX FDSOI MOS devices , 2014 .

[20]  Sorin Cristoloveanu,et al.  Ultra-thin fully-depleted SOI MOSFETs: Special charge properties and coupling effects , 2007 .

[21]  R.V.H. Booth,et al.  Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's , 1987 .

[22]  F. Balestra,et al.  Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance , 1987, IEEE Electron Device Letters.