Reducing the standby power consumption of personal computers
暂无分享,去创建一个
[1] S.-A. Liang. A high power and high efficiency PC power supply topology with low cost design to meet 80 Plus Bronze requirements , 2009, 2009 IEEE International Conference on Industrial Technology.
[2] Siu Ki Paul Kwok,et al. Power-saving algorithms in electricity usage - comparison between the power saving algorithms and machine learning techniques , 2010, 2010 IEEE Conference on Innovative Technologies for an Efficient and Reliable Electricity Supply.
[3] Wei Min,et al. Design and Implementation of Low Power Consumption Wireless Pressure Transmitter Monitoring System , 2009, 2009 International Conference on Computational Intelligence and Software Engineering.
[4] Chaitali Chakrabarti,et al. A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).
[5] D. Korn,et al. Power management of computers , 2004, IEEE International Symposium on Electronics and the Environment, 2004. Conference Record. 2004.
[6] Ying-Wen Bai,et al. Remotely Controllable Outlet System for Home Power Management , 2006, 2006 IEEE International Symposium on Consumer Electronics.
[7] Ying-Wen Bai,et al. Remote-Controllable Power Outlet System for Home Power Management , 2007, IEEE Transactions on Consumer Electronics.
[8] Ying-Wen Bai,et al. Design and implementation of a socket with low standby power , 2009, 2009 IEEE 13th International Symposium on Consumer Electronics.
[9] Hiroshi Kawaguchi,et al. Half VDD Clock-Swing Flip-Flop with Reduced Contention for up to 60% Power Saving in Clock Distribution , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.