Thermally Assisted Superconductor Transistors for Josephson-CMOS Hybrid Memories
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Nobuyuki Yoshikawa | Akira Fujimaki | Masumi Inoue | Masamitsu Tanaka | Masato Suzuki | Kohei Maruyama | Kyosuke Sano | Soya Taniguchi
[1] Lixing You,et al. Superconducting properties and chemical composition of NbTiN thin films with different thickness , 2015 .
[2] T. Van Duzer,et al. Simulation and measurements on a 64-kbit hybrid Josephson-CMOS memory , 2005, IEEE Transactions on Applied Superconductivity.
[3] Karl K Berggren,et al. A superconducting-nanowire three-terminal electrothermal device. , 2014, Nano letters.
[4] Y. Yamanashi,et al. Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, ${\rm CORE}1\beta$ , 2007, IEEE Transactions on Applied Superconductivity.
[5] Yuki Yamanashi,et al. Fully Functional Operation of Low-Power 64-kb Josephson-CMOS Hybrid Memories , 2017, IEEE Transactions on Applied Superconductivity.
[6] Kazuyoshi Takagi,et al. High-Speed Demonstration of Bit-Serial Floating-Point Adders and Multipliers Using Single-Flux-Quantum Circuits , 2015, IEEE Transactions on Applied Superconductivity.
[7] Yoshinori Uzawa,et al. Improvement of the critical temperature of superconducting NbTiN and NbN thin films using the AlN buffer layer , 2010 .
[8] O. Okunev,et al. Picosecond superconducting single-photon optical detector , 2001 .
[9] H. Terai,et al. Origin of intrinsic dark count in superconducting nanowire single-photon detectors , 2011, 1103.2844.
[10] Nobuyuki Yoshikawa,et al. Josephson-CMOS Hybrid Memory With Nanocryotrons , 2017, IEEE Transactions on Applied Superconductivity.
[11] V. Semenov,et al. RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.
[12] Kazuyoshi Takagi,et al. Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation , 2014, IEICE Trans. Electron..
[13] Karl K. Berggren,et al. A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics , 2016, 1610.09349.
[14] N. Yoshikawa,et al. Time Measurements of the Josephson-CMOS Hybrid Memory using Single Flux Quantum Circuits , 2006 .
[15] V. V. Ryazanov,et al. Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory , 2013, IEEE Transactions on Applied Superconductivity.
[16] Takatsugu Ono,et al. Towards Ultra-High-Speed Cryogenic Single-Flux-Quantum Computing , 2018, IEICE Trans. Electron..
[17] S.V. Rylov,et al. Josephson output interfaces for RSFQ circuits , 1997, IEEE Transactions on Applied Superconductivity.
[18] T. Van Duzer,et al. Superconductor-semiconductor memories , 1993, IEEE Transactions on Applied Superconductivity.
[19] M. G. Blamire,et al. Controlled Injection of Spin-Triplet Supercurrents into a Strong Ferromagnet , 2010, Science.
[20] Kazuyoshi Takagi,et al. Large-Scale Integrated Circuit Design Based on a Nb Nine-Layer Structure for Reconfigurable Data-Path Processors , 2014, IEICE Trans. Electron..
[21] Zhen Wang,et al. Characterization of NbTiN Thin Films Deposited on Various Substrates , 2011, IEEE Transactions on Applied Superconductivity.
[22] A. Inoue,et al. A Josephson driver to interface Josephson junctions to semiconductor transistors , 1988, Technical Digest., International Electron Devices Meeting.
[23] Xiaofan Meng,et al. 64-kb Hybrid Josephson-CMOS 4 Kelvin RAM With 400 ps Access Time and 12 mW Read Power , 2013, IEEE Transactions on Applied Superconductivity.