Passive reduced-order models for interconnect simulation and their computation via Krylov-subspace algorithms
暂无分享,去创建一个
[1] M. R. Wohlers. Lumped and distributed passive networks , 1969 .
[2] Lawrence T. Pileggi,et al. PRIMA: passive reduced-order interconnect macromodeling algorithm , 1997, ICCAD 1997.
[3] Roland W. Freund,et al. Reduced-order modeling of large passive linear circuits by means of the SYPVL algorithm , 1996, ICCAD 1996.
[4] Roland W. Freund,et al. Efficient linear circuit analysis by Pade´ approximation via the Lanczos process , 1994, EURO-DAC '94.
[5] C. Lanczos. An iteration method for the solution of the eigenvalue problem of linear differential and integral operators , 1950 .
[6] Roland W. Freund,et al. Reduced-order modeling of large linear passive multi-terminal circuits using matrix-Pade approximation , 1998, Proceedings Design, Automation and Test in Europe.
[7] Louis Weinberg,et al. Network Analysis and Synthesis , 1962 .
[8] Roland W. Freund,et al. Interconnect-Delay Computation and Signal-Integrity Verification Using the SyMPVL Algorithm , 1997 .
[9] W. Arnoldi. The principle of minimized iterations in the solution of the matrix eigenvalue problem , 1951 .
[10] Lawrence T. Pileggi,et al. Asymptotic waveform evaluation for timing analysis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[11] Shirley Dex,et al. JR 旅客販売総合システム(マルス)における運用及び管理について , 1991 .
[12] P. Feldmann,et al. The SyMPVL algorithm and its applications to interconnect simulation , 1997, SISPAD '97. 1997 International Conference on Simulation of Semiconductor Processes and Devices. Technical Digest.
[13] Mattan Kamon,et al. A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits , 1999 .
[14] Roland W. Freund,et al. Reduced-Order Modeling of Large Linear Subcircuits via a Block Lanczos Algorithm , 1995, 32nd Design Automation Conference.
[15] Ibrahim M. Elfadel,et al. Zeros and passivity of Arnoldi-reduced-order models for interconnect networks , 1997, DAC.
[16] Zhaojun Bai,et al. How to make theoretically passive reduced-order models passive in practice , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).
[17] Brian D. O. Anderson,et al. Network Analysis and Synthesis , 1973 .
[18] R. Freund,et al. Passive reduced-order models for interconnect simulation and their computation via Krylov-subspace algorithms , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).
[19] Jacob K. White,et al. A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits , 1996, ICCAD 1996.