8-760 Fall'01 Vlsi Cad Paper Review 2 1.0 Intent 2.0 Objectives

One of the goals of 18-760 is that you acquire enough about the " fundamental " ideas of CAD algorithms to be able to read new papers and see where they borrow from known techniques, and where they innovate. Even just this far through this class, you (should) now know a lot about basic Boolean representation, manipulation, verification, etc. The intent here is for you to write a short review (not to exceed 4 typed 8.5 X 11 pages, in a reasonable font, including any figures and tables) analyzing the attached paper: You already know about logic synthesis and mapping. Turns out there are many tricks to " restructure " or " augment " logic-level designs so as to minimize the overall power consumption. This is one particularly successfull approach. We want you to summarize the paper, analyze what new ideas it is offering, connect it to other ideas that are already well-understood (in this case, logic synthesis), and critique how well the results presented actually measure up to the goals set forth by the author. You can regard this as preparation for one of two scenarios: • Your boss in some company has seen this paper and thinks it may offer a solution to a pressing CAD problem. But your boss is a busy person; she's got other stuff to do than just read these things and figure out if they really work. So she asks you to write a summary evaluating whether this looks like a good idea. • You actually have to write a program to solve a problem like the one being described here. To clarify your own thinking, you want to write up a summary for you and your fellow CAD hackers that tries to ferret out whether the assumptions, proposed solution techniques, and experimental results, really make sense and offer a viable solution strategy for this problem.

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[10]  Kurt Keutzer,et al.  On average power dissipation and random pattern testability of CMOS combinational logic networks , 1992, ICCAD.

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