Optimization of thermoelectric cooling for microelectronics

The electronics industry has traditionally cooled critical components using a simple fan/heat sink assembly. Each advance in IC fabrication technology has resulted in the need for a higher performance thermal solution, stressing the limits of conventional fan/heat sink technology. A possible solution to relieve the pressure being placed on future fan/heat sink technology is to incorporate thermoelectric (TE) cooling into the configuration. It has been established that when using TE technology in electronic applications the entire system needs to be optimized simultaneously. This study is an expansion of previous work as it provides an analytic expression for the TE element geometry that minimizes the junction temperature in an electronic application. Further, it is shown that a minimum junction temperature and a maximum COP can be simultaneously achieved by optimizing both the applied current and the TE geometry. Experimental measurements on commercial TE modules are presented that validate the 1-dimensional thermal-electric models. The measurements precisely match predictions if temperature dependent material properties are used in the models. A model based case study suggests that up to ~100 W can be dissipated using a 0.4 K/W heat sink and an optimized bismuth-telluride TE module while maintaining a 85 degC junction temperature

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