Low-temperature wafer-level transfer bonding

In this paper, we present a new wafer-level transfer bonding technology. The technology can be used to transfer devices or films from one substrate wafer (sacrificial device wafer) to another substrate wafer (target wafer). The transfer bonding technology includes only low-temperature processes; thus, it is compatible with integrated circuits. The process flow consists of low-temperature adhesive bonding followed by sacrificially thinning of the device wafer. The transferred devices/films can be electrically interconnected to the target wafer (e.g., a CMOS wafer) if required. We present three example devices for which we have used the transfer bonding technology. The examples include two polycrystalline silicon structures and a test device for temperature coefficient of resistance measurements of thin-film materials. One of the main advantages of the new transfer bonding technology is that transducers and integrated circuits can be independently processed and optimized on different wafers before integrating the transducers on the integrated circuit wafer. Thus, the transducers can be made of, e.g., monocrystalline silicon or other high-temperature annealed, high-performance materials. Wafer-level transfer bonding can be a competitive alternative to flip-chip bonding, especially for thin-film devices with small feature sizes and when small electrical interconnections (<3/spl times/3 /spl mu/m/sup 2/) between the devices and the target wafer are required.

[1]  Jan H. J. Fluitman,et al.  Sacrificial wafer bonding for planarization after very deep etching , 1995 .

[2]  David J. Beebe,et al.  Design rules for polyimide solvent bonding , 1999 .

[3]  W. Pamler,et al.  Three dimensional metallization for vertically integrated circuits , 1997, European Workshop Materials for Advanced Metallization,.

[4]  R. Dekker,et al.  A low-cost substrate transfer technology for fully integrated transceivers , 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).

[5]  Peter Enoksson,et al.  Low temperature full wafer adhesive bonding of structured wafers , 2000 .

[6]  T. Kurokawa,et al.  Novel technology for hybrid integration of photonic and electronic circuits , 1996, IEEE Photonics Technology Letters.

[7]  Michael J. Berry,et al.  Soft Mask for Via Patterning in Benzocyclobutene , 1993 .

[8]  G. Stemme,et al.  Void-free full wafer adhesive bonding , 2000, Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308).

[9]  L. Deferm,et al.  CMOS compatible wafer scale adhesive bonding for circuit transfer , 1997, Proceedings of International Solid State Sensors and Actuators Conference (Transducers '97).

[10]  K. Harsh,et al.  Flip-chip assembly for Si-based RF MEMS , 1999, Technical Digest. IEEE International MEMS 99 Conference. Twelfth IEEE International Conference on Micro Electro Mechanical Systems (Cat. No.99CH36291).

[11]  G. Stemme,et al.  Spiked biopotential electrodes , 2000, Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308).

[12]  D. Kossives,et al.  GaAs MQW modulators integrated with silicon CMOS , 1995, IEEE Photonics Technology Letters.

[13]  Mitsumasa Koyanagi,et al.  Three-dimensional integration technology for real time micro-vision system , 1997, 1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon.

[14]  R. Horowitz,et al.  Batch micropackaging by compression-bonded wafer-wafer transfer , 1999, Technical Digest. IEEE International MEMS 99 Conference. Twelfth IEEE International Conference on Micro Electro Mechanical Systems (Cat. No.99CH36291).

[15]  G. Stemme,et al.  Low temperature full wafer adhesive bonding , 2001 .

[16]  M. Wu,et al.  A substrate-independent wafer transfer technique for surface-micromachined devices , 2000, Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308).

[17]  H. Chui,et al.  Epoxy bond and stop-etch (EBASE) technique enabling backside processing of (Al)GaAs heterostructures , 1996 .