The problem considered in this paper is the design of a checking experiment which will determine from observation of input-output behavior whether a sequential switching circuit is operating correctly. An input sequence is applied to the circuit, and the output sequence is observed and compared to the correct output sequence which has been determined from the state table corresponding to the correctly operating circuit. The sequential machines under consideration here must be 1) strongly connected, 2) reduced, and 3) have a distinguishing sequence [1]. The malfunctions which occur in the circuit are assumed to be those which do not increase the number of states in the circuit. In Hennie [1], a general synthesis procedure is proposed for checking experiments on machines in the class defined previously. The procedure to be proposed here is a modification of that procedure for which the upper bound on the length is reduced. Familiarity with at least the first portion of Hennie [1] on the synthesis of checking experiments for machines having distinguishing sequences is assumed.
[1]
William G. Brown,et al.
Improvement of Electronic-Computer Reliability through the Use of Redundancy
,
1961,
IRE Trans. Electron. Comput..
[2]
Shmuel Winograd.
Redundancy and Complexity of Logical Elements
,
1963,
Inf. Control..
[3]
Wan H. Kim,et al.
Single error-correcting codes for asymmetric binary channels
,
1959,
IRE Trans. Inf. Theory.
[4]
G. Metze,et al.
Transition Matrices of Sequential Machines
,
1959
.
[5]
Wan H. Kim,et al.
Multi-error correcting codes for a binary asymmetric channel
,
1959,
IRE Trans. Inf. Theory.
[6]
Claude E. Shannon,et al.
Reliable Circuits Using Less Reliable Relays
,
1956
.
[7]
D. B. Armstrong.
A general method of applying error correction to synchronous digital systems
,
1961
.