暂无分享,去创建一个
Margaret Martonosi | Daniel Lustig | Caroline Trippel | M. Martonosi | Daniel Lustig | Caroline Trippel
[1] Margaret Martonosi,et al. CCICheck: Using μhb graphs to verify the coherence-consistency interface , 2015, 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[2] Emina Torlak,et al. Synthesizing memory models from framework sketches and Litmus tests , 2017, PLDI 2017.
[3] Gernot Heiser,et al. A survey of microarchitectural timing attacks and countermeasures on contemporary hardware , 2016, Journal of Cryptographic Engineering.
[4] Margaret Martonosi,et al. RTLCheck: Verifying the Memory Consistency of RTL Designs , 2017, 2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[5] Emina Torlak,et al. Kodkod: A Relational Model Finder , 2007, TACAS.
[6] Margaret Martonosi,et al. PipeCheck: Specifying and Verifying Microarchitectural Enforcement of Memory Consistency Models , 2014, 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture.
[7] Jade Alglave,et al. Fences in Weak Memory Models , 2010, CAV.
[8] Sridhar Narayanan,et al. TSOtool: a program for verifying memory systems using the memory consistency model , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..
[9] David A. Wood,et al. A Primer on Memory Consistency and Cache Coherence , 2012, Synthesis Lectures on Computer Architecture.
[10] Daniel Lustig,et al. Automated Synthesis of Comprehensive Memory Model Litmus Test Suites , 2017, ASPLOS.
[11] Jade Alglave,et al. Litmus: Running Tests against Hardware , 2011, TACAS.
[12] Margaret Martonosi,et al. COATCheck: Verifying Memory Ordering at the Hardware-OS Interface , 2016, ASPLOS.
[13] Margaret Martonosi,et al. TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA , 2016, ASPLOS.