Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation
暂无分享,去创建一个
Denis Flandre | Marcelo Antonio Pavanello | Rodrigo Trevisoli Doria | Antonio Cerdeira | Jean-Pierre Raskin | D. Flandre | J. Raskin | A. Cerdeira | R. Doria | M. Pavanello
[1] Abhinav Kranti,et al. Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications , 2004 .
[2] Denis Flandre,et al. Channel Length Reduction Influence on Harmonic Distortion of Graded-Channel Gate-All-Around Devices , 2007 .
[3] Denis Flandre,et al. Comparison of analog performance in conventional and graded-channel fully-depleted SOI MOSFETs , 2000 .
[4] Mohammed Ismail,et al. Low-Voltage CMOS Operational Amplifiers: Theory, Design and Implementation , 1994 .
[5] Denis Flandre,et al. New method for determination of harmonic distortion in SOI FD transistors , 2002 .
[6] Denis Flandre,et al. Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS , 2006, Microelectron. J..
[7] D. Flandre,et al. Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor , 2005, IEEE Transactions on Electron Devices.
[8] Denis Flandre,et al. Analog circuit design using graded-channel SOI nMOSFETs , 2001, Symposium on Integrated Circuits and Systems Design.
[9] Denis Flandre,et al. Gate-all-around OTA's for rad-hard and high-temperature analog applications , 1999 .
[10] Denis Flandre,et al. Analog circuit design using graded-channel silicon-on-insulator nMOSFETs , 2002 .
[11] J.-P. Raskin,et al. Analog/RF performance of multiple gate SOI devices: wideband simulations and characterization , 2006, IEEE Transactions on Electron Devices.
[12] Piet Wambacq,et al. Distortion analysis of analog integrated circuits , 1998 .
[13] J. Colinge. Silicon-on-Insulator Technology: Materials to VLSI , 1991 .
[14] Denis Flandre,et al. Effective mobility in FinFET structures with HfO2 and SiON gate dielectrics and TaN gate electrode , 2005 .
[15] Denis Flandre,et al. High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures , 2005 .
[16] Denis Flandre,et al. Modelling and application of fully depleted SOI MOSFETs for low voltage, low power analogue CMOS circuits , 1996 .
[17] Denis Flandre,et al. A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation , 2005 .
[18] Denis Flandre,et al. Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects , 2000 .
[19] D. Flandre,et al. Impact of Asymmetric Channel Configuration on the Linearity of Double-Gate SOI MOSFETs , 2006, 2006 International Caribbean Conference on Devices, Circuits and Systems.
[20] D. Flandre,et al. Nonlinearity Analysis of FinFETs , 2006, 2006 International Caribbean Conference on Devices, Circuits and Systems.
[21] Denis Flandre,et al. Influence of device engineering on the analog and RF performances of SOI MOSFETs , 2003 .
[22] Denis Flandre,et al. Integral function method for determination of nonlinear harmonic distortion , 2004 .
[23] J. P. Eggermont,et al. Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits , 1999 .